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downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:38:15 pm PM73121 aal1gator ii errata pmc-980825 issue 3 eight link circuit emulation service on a chip pmc-sierra, inc. 105 - 8555 baxter place burnaby, bc canada v5a 4v7 604 .415.6000 PM73121 eight link circuit emulation service on a chip revision a device errata issue 3: february 1999
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:38:15 pm PM73121 aal1gator ii errata pmc-980825 issue 3 eight link circuit emulation service on a chip i proprietary and confidential to pmc-sierra, inc., and for its customers internal use contents 1 features ...............................................................................................1 1.1 device identification............................................................. 1 1.2 references .............................................................................. 1 2 functional deficiency list ........................................................... 2 2.1 does not always generate a zero pointer when starting a queue in sdf-mf mode...................................... 3 2.2 data cells may be dropped when oam cells are generated ................................................................................. 7 2.3 bit integrity is not always maintained under certain error conditions................................................................... 8 2.4 bandwidth for a ds3 line cannot always be maintained with a 38.88 mhz system clock .................... 8 2.5 behavior of rphy_soc with respect to rphy_clav in phy mode.................................................................................... 9 3 (updated) changes to timing parameters .............................. 10
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:38:15 pm PM73121 aal1gator ii errata pmc-980825 issue 3 eight link circuit emulation service on a chip 1 proprietary and confidential to pmc-sierra, inc., and for its customers internal use 1 features this document is the device errata sheet for the revision a of PM73121. 1.1 device identification this document applies only to revision a of the PM73121. as illustrated in figure 1.1, the revision code is marked on the face of the device. the PM73121 revision a is in a 240-pin pqfp package. 180 121 120 61 181 240 1 60 PM73121-ri l_______a lyyww part number wafer batch code pmc logo assembly date code index mark top view scale : 3:1 (approx.) aal1gator ii name tm figure 1.1: PM73121-ri branding format. 1.2 references 1. pmc-980620, aal1 sar processor long form datasheet, issue 3 (january 1999).
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:38:15 pm PM73121 aal1gator ii errata pmc-980825 issue 3 eight link circuit emulation service on a chip 2 proprietary and confidential to pmc-sierra, inc., and for its customers internal use 2 functional deficiency list this section describes the known functional deficiencies associated with revision a of the PM73121, as of the publication date of this document. for each deficiency, the known work-around is also described. please report any functional deficiencies not covered in this document to pmc-sierra, inc. pmc-sierra, inc. 105-8555 baxter place burnaby, bc canada v5a 4v7 tel: (604) 415-6000 fax: (604) 415-6001 product information: info@pmc-sierra.bc.ca applications information: apps@pmc-sierra.bc.ca web site: http://www.pmc-sierra.com
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:38:15 pm PM73121 aal1gator ii errata pmc-980825 issue 3 eight link circuit emulation service on a chip 3 proprietary and confidential to pmc-sierra, inc., and for its customers internal use 2.1 does not always generate a zero pointer when starting a queue in sdf-mf mode description in sdf-mf mode, the aal1gator ii does not conform with the following text contained in itu-t recommendation i.363.1: the first structured block to be transmitted after the aal connection is established uses the p format with sequence count value in the sar-pdu header equal to 0 and with the first octet of the structured data placed in the second octet of the sar-pdu payload. specifically, the start of the structure may not occur in the second octet of the sar-pdu payload in sdf-mf mode. the aal1gator ii begins sending a cell in the frame in which it is scheduled. since this frame may or may not be the start of a multiframe, the first byte may or may not be the first byte of a new structure. the pointer will point to wherever the structure begins. the initial (first) pointer generated in sdf-mf mode is deterministic and can be calculated from the following expressions: let x = remainder(frames_per_cell ? mf_size) num_chan + sig_bytes where: mf_size (for e1) = 16 mf_size (for t1) = 24 sig_bytes = the number of signaling bytes in the structure note: if the remainder is 0, then sig_bytes should be ignored and the initial pointer is 0.
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:38:15 pm PM73121 aal1gator ii errata pmc-980825 issue 3 eight link circuit emulation service on a chip 4 proprietary and confidential to pmc-sierra, inc., and for its customers internal use for full cells: if x 93 then initial pointer = x else first cell built(sn = 0) will not contain a pointer. initial pointer will be in 3 rd cell built (sn = 2). initial pointer = x - (47 2) ((47 2) accounts for the bytes in the first two cells.) endif for partial cells: if x bytes_per_cell then initial pointer = x elseif bytes_per_cell < x (2 bytes_per_cell) then initial pointer = 46 + (x - bytes_per_cell) else initial pointer will be in sn = 2 cell (3 rd cell built). initial pointer = x - (2 bytes_per_cell) endif work around this non-conformance is not known to cause any incompatibility problems. no work- around is necessary. typically, robust aal1 cell receivers can tolerate pointers of any value if the initial pointer is lost in the network. you can also force initial multiframe alignment, and an initial pointer of 0 by increasing the frames_per_cell value for the queue so it falls on a multiframe boundary in the transmitter data buffer. since frames_per_cell controls how far back in time data is read, delay increases if frames_per_cell increases. the increase will be 125 m s for each frame added. for example, for an e1 line with 32 channels allocated, fully filled cells, the initial pointer will be: x = remainder (3 ? 16) 32 + 16 = 112. since x > 93, the initial pointer = x - (47 2) = 18.
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:38:15 pm PM73121 aal1gator ii errata pmc-980825 issue 3 eight link circuit emulation service on a chip 5 proprietary and confidential to pmc-sierra, inc., and for its customers internal use since all queues are added in frame 0 of multiframe 0, the talp starts building the cell frames_per_cell = 3 frames back in the transmit buffer from frame 0 in multiframe. to generate an initial pointer of 0, the talp must start building the cell on a multiframe boundary (for example, multiframe frame 0). this can be accomplished by increasing frames_per_cell to 16. for t1, with its 24 channels, frames_per_cell should be increased to 24 to generate an initial pointer of 0. figure 1 shows the transmit data organization for e1 and figure 2 shows the transmit data organization for t1. mf 0 fram e 1 mf 0 fram e 0 mf 7 fram e 15 mf 7 fram e 14 mf 7 fram e 13 mf 7 fram e 12 ... mf 7 fram e 2 mf 7 fram e 1 mf 7 fram e 0 mf 6 fram e 15 mf 6 fram e 14 queues always added in mf 0, frame 0. frames_per_cell=3r esults in talp starting here. (initial pointer = 18) frames_per_cell = 16 results in talp starting here. (initial pointer = 0) figure 1: transmit data buffer organization for e1 mf 0 frame 1 mf 0 frame 0 mf 3 frame 23 mf 3 frame 22 mf 3 frame 21 mf 3 frame 20 ... mf 3 frame 2 mf 3 frame 1 mf 3 frame 0 mf 2 frame 15 mf 2 frame 14 queues always ad ded in mf 0, fra me 0. frame s_pe r_ce ll = 3 results in talp s tarting her e. (initial poin ter = 84) frame s_pe r_ce ll = 24 results in talp s tarting he re. (initial po inter = 0) figure 2: transmit data buffer organization for t1
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:38:15 pm PM73121 aal1gator ii errata pmc-980825 issue 3 eight link circuit emulation service on a chip 6 proprietary and confidential to pmc-sierra, inc., and for its customers internal use table 1 shows the initial (first) pointer value generated in sdf-mf mode and the specific value required to generate an initial pointer of 0 for full cells. table 1: initial pointer for full cell situations num_chan frames_ per_cell sig_bytes 1 st pointer (e1) 1 st pointer (t1) frames per cell for 1 st pointer = 0 (for e1) frames per cell for 1 st pointer = 0 (for t1) 1481 0 0n/an/a 22511933248 3172 5533224 4 13 2 54 54 16 24 5 11 3 58 58 16 24 6 9 3 57 57 16 24 7 8 4 60 60 16 24 8 7 4 60 60 16 24 9 7 5 68 68 16 24 10 6 5 65 65 16 24 11 6 6 72 72 16 24 12 5 6 66 66 16 24 13 5 7 72 72 16 24 14 5 7 77 77 16 24 15 5 8 83 83 16 24 16 4 8 72 72 16 24 17 4 9 77 77 16 24 18 4 9 81 81 16 24 19 4 1086861624 20 4 1090901624 214111*1*1624 224115*5*1624 23 4 12 10* 10* 16 24 24 3 1284841624 25 3 13 88 n/a 16 n/a 26 3 13 91 n/a 16 n/a 27 3 14 1* n/a 16 n/a 28 3 14 4* n/a 16 n/a 29 3 15 8* n/a 16 n/a 30 3 15 11* n/a 16 n/a 31 3 16 15* n/a 16 n/a 32 3 16 18* n/a 16 n/a note* indicates the pointer is in sn = 2.
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:38:15 pm PM73121 aal1gator ii errata pmc-980825 issue 3 eight link circuit emulation service on a chip 7 proprietary and confidential to pmc-sierra, inc., and for its customers internal use 2.2 data cells may be dropped when oam cells are generated description if the transmit utopia fifo fills up due to backpressure on the utopia bus and the last cell written into the fifo is an oam cell and another cell request is pending, the pending cell will be dropped. this situation can occur only if an oam cell fills the fifo and a cell request is pending as the last byte of the oam cell is being written into the fifo. symptoms of this problem will be sn errors and lost cells detected on the remote end. since oam cells are sent at a low rate (usually one per second), the error rate caused by this problem will be quite low. sn processing should minimize the impact of this problem. work around two solutions to this problem are: 1) minimize backpressure on the transmit utopia port, or 2) generate oam cells by some other means. 1. the utopia bus has a 2-cell fifo. the shortest amount of time that an oam could be written into the fifo is 139 sys_clk cycles (3.6 m s if sys_clk = 38.88 mhz). therefore, the first cell in the fifo needs to be written out within 3.6 m s to guarantee the fifo will not fill up. with no backpressure (/tatm_full always high) and a 25 mhz utopia clock rate, it takes 2.1 m s to write out a cell. therefore, the worst-case backpressure per cell must be less than 1.5 m s. note: as more lines and queues are added, the time it takes to build an oam cell increases, since it takes more time to access the processor bus for each word. therefore, more backpressure can be tolerated before the fifo fills up. 2. the second solution is to generate oam cells farther down stream, past the transmit utopia port. since this problem exists only with oam cells, the problem cannot occur.
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:38:15 pm PM73121 aal1gator ii errata pmc-980825 issue 3 eight link circuit emulation service on a chip 8 proprietary and confidential to pmc-sierra, inc., and for its customers internal use 2.3 bit integrity is not always maintained under certain error conditions description bit integrity will not always be maintained when fewer than six cells are missing, or when a single errored cell occurs. there are two specific cases where bit integrity will not be maintained. if the cell containing a pointer value of 00 or the cell before a cell containing a pointer value of 00 has an sn error and the structure size is greater than the available payload of two cells. for full cell queues that meet these characteristics, there is about a 0.3% chance that a lost cell would cause bit integrity to be lost. if the following sequence of events occurs: (sn = 4, lost cell, lost cell, sn = 7, sn = 0, lost cell) and a pointer is in the cell with sn = 0 and the cell with sn = 7 is the first cell after an underrun. for both of these cases, the aal1gator ii will detect a pointer mismatch error with the next pointer received after the lost cell, and will resynchronize to the next pointer. work around there is no work-around for this problem. the chance of this condition occurring is very small, and the overall impact is very minimal. 2.4 bandwidth for a ds3 line cannot always be maintained with a 38.88 mhz system clock description bandwidth for a ds3 line cannot always be maintained with a 38.88 mhz system clock. work around the aal1gator ii can support a 40 mhz system clock. by using a 40 mhz system clock, the ds3 bandwidth can be maintained as long as the processor accesses the aal1gator fewer than 100 times per millisecond.
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:38:15 pm PM73121 aal1gator ii errata pmc-980825 issue 3 eight link circuit emulation service on a chip 9 proprietary and confidential to pmc-sierra, inc., and for its customers internal use 2.5 behavior of rphy_soc with respect to rphy_clav in phy mode description when PM73121 utopia interface is configured in phy mode, the devices asserts rphy-soc, receive utopia layer start of cell , when rphy_data contains the first valid byte of the cell. while receiving atm cells, if the atm layer device keeps /rphy_en, receive phy layer enable , asserted for longer than a cell time, the PM73121 will deassert rphy_clav, receive utopia layer cell available , at the completion of the cell and simultaneously assert rphy_soc. this behavior may confuse some atm layer devices that do not qualify rphy_soc signal with rphy_clav signal as required by utopia level 1 specification: rxclav indicates cycles when there is valid information on rxdata/rxsoc. work around for those atm layer devices that do not qualify rphy_soc with rphy_clav, the solution is to connect the PM73121 rphy_soc and rphy_clav signals into an and gate, and then connect the and gate output to the rxsoc input of the atm layer device.
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:38:15 pm PM73121 aal1gator ii errata pmc-980825 issue 3 eight link circuit emulation service on a chip 10 proprietary and confidential to pmc-sierra, inc., and for its customers internal use 3 (updated) changes to timing parameters the following timing parameters have been updated in issue 2 of PM73121 aal1gator datasheet (pmc-980620). please refer to the datasheet for additional information: fig 1 description symbol parameter signal min max unit 55 transmit side interface bit timing th clock hold rl_ser 2 ns 58 transmit side high- speed interface bit timing th clock hold rl_ser[0] 2 ns 59 receive side low- speed interface timing tq clock-to-output delay tl_sig, tl_ser 214 ns 63 transmit utopia atm timing tq clock-to-output delay tatm_data 2 13 ns 64 tutopia sphy timing tq clock-to-output delay rphy_data 2 13 ns 65 tutopia mphy timing tq clock-to-output delay rphy_data 2 13 ns 74 ram write cycle timing twp write pulse width /mem_we tch-1.3 tch+0.3 ns 76 microprocessor memory write cycle timing tq clock-to-output delay /proc_ack 2 18 ns 76 microprocessor memory write cycle timing tq clock-to-output delay /mem_cs 2 18 ns 77 memory read cycle timing tq clock-to-output delay /mem_cs 2 18 ns 77 memory read cycle timing tqmoe clock-to-output delay for activation of /mem_oe /mem_oe 2 25 ns 78 microprocessor command register write cycle timing tq clock-to-output delay /proc_ack 2 18 ns 1 figure numbers are from PM73121 datasheet (pmc-980620).
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:38:15 pm PM73121 aal1gator ii errata pmc-980825 issue 3 eight link circuit emulation service on a chip 11 proprietary and confidential to pmc-sierra, inc., and for its customers internal use fig 1 description symbol parameter signal min max unit 82 interrupt timing tq clock-to-output delay proc_intr 2 17 ns
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:38:15 pm PM73121 aal1gator ii errata pmc-980825 issue 3 eight link circuit emulation service on a chip 12 proprietary and confidential to pmc-sierra, inc., and for its customers internal use notes
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:38:15 pm PM73121 aal1gator ii errata pmc-980825 issue 3 eight link circuit emulation service on a chip none of the information contained in this document constitutes an express or implied warranty by pmc-sierra, inc. as to the suf ficiency, fitness or suitability for a particular purpose of any such information or the fitness, or suitability for a particular purpose, merchanta bility, performance, compatibility with other parts or systems, of any of the products of pmc-sierra, inc., or any portion thereof, referred to in this document. pmc-sierra, inc. expressly disclaims all representations and warranties of any kind regarding the contents or use of the information, including, but not l imited to, express and implied warranties of accuracy, completeness, merchantability, fitness for a particular use, or non-infringement. in no event will pmc-sierra, inc. be liable for any direct, indirect, special, incidental or consequential damages, including, but not limited to, lost profits, lost business or lost data resulting from any use of or reliance upon the information, whether or not pmc-sierra, inc. has been advised of the possibility of such damage. ? 1999 pmc-sierra, inc. pmc-980825 (p3) issue date: february, 1999 pmc-sierra, inc. 105 - 8555 baxter place burnaby, bc canada v5a 4v7 604 .415.6000 proprietary and confidential to pmc-sierra, inc., and for its customers internal use contacting pmc-sierra, inc. pmc-sierra, inc. 105-8555 baxter place burnaby, bc canada v5a 4v7 tel: (604) 415-6000 fax: (604) 415-6200 document information: document@pmc-sierra.com corporate information: info@pmc-sierra.com application information: apps@pmc-sierra.com web site: http://www.pmc-sierra.com

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